Time Domain Gating

Filter Application

Selection of the correct gate width and shape is essential for achieving an accurate result without introducing mathematical artifacts. When time domain gating is applied, the window function attenuates the signals outside of the specified time range. A narrow gate provides high isolation but can cause ripple in the frequency domain if the edges of the window are too sharp.

Engineers typically use a Kaiser or a Gaussian window to balance the trade off between gate resolution and frequency response accuracy. This allows for the clean extraction of the s-parameters for a specific discontinuity on a trace. The effectiveness of the filter depends on the total bandwidth of the measurement, as more bandwidth provides better time resolution.

Proper window selection is verified by observing the stability of the frequency plot.

Reflection Selection

Identifying the physical location of the reflections requires a deep understanding of the signal path and the velocity of propagation. During time domain gating, the reflectometer plot shows the impedance changes at various distances along the transmission line. The gate is placed over the peak that corresponds to the component under test, such as a solder joint or a transition between layers.

This effectively removes the reflections from the adapters and the test environment from the final measurement. This is particularly useful for de-embedding the effects of test fixtures that cannot be physically removed. The resulting data represents only the device under test, providing a more accurate picture of its performance.

This isolation is necessary for verifying the design against strict integrity requirements.

Fixture Extraction

High frequency measurements are often complicated by the presence of connectors and cables that are not part of the final product. While time domain gating allows for the removal of these parasitic effects, it requires the test setup to be stable and repeatable. Any movement in the cables or changes in the temperature can shift the position of the reflections and make the gate inaccurate.

Technicians monitor the time domain plot to ensure that the gate remains centered on the target component during the entire test sequence. This technique reduces the need for expensive custom calibration kits for every new board design. It provides a flexible way to characterize the performance of complex assemblies in a standard laboratory environment.

The gated data is used to update the system models for better simulation accuracy.